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I want to use external SDR SDRAM (alliance memory AS4C8M16SA 128 Mbits, single IC) for my next project with an STM32F429 MCU, I'm now at the layout phase, I have done a first layout (mockup, it is not complete), I'm trying to get a reasonable length matching(still working on that and by what I can seam to find online this is not iper critical), and the tracks are on the short side 74 mm in at max, but mostly under 55 mm, what my question is do I really have to keep 50 ohm impedance or can I get away without it
Now I did the following calculation:
On the datasheet of the mcu i find the worst case/smallest rise time (very high speed, CL=10pF Vdd>2.7) which is 2 ns, to get to the bandwidth i use the following relationship BW[GHz] = 0.35/tr[ns] this gives me a maximum frequency of 140 MHz.
Now We know that the wavelenght lambda=c/f that in this case results 2.14 m so my traces are at least 1/25 of the wavelenght and by what I have been thougt I can consider them short and have them in a unmatched
Am I right? will it work? and more importantly will it have any chance of passing EMI tesing (EU if that matters)
- Comments(1)
A****min
Jul 26.2019, 16:31:41
The best thing to do is use a board with at least 4 layers. By optimising the data lanes you may be able to route all data lines on the same layer. You'll need to pay carefull attention to the address and clock lines as well. The drawback of using SDRAM is that the address, control and data lines run at the same frequency and you will likely have to match the length of all these traces but this is something you'll have to look up in an application note of the microcontroller and the memory. I strongly suggest to use the memory noted in the microcontroller's datasheet/appnotes!
BTW: It may sound weird but using DDR memory is much easier because each byte lane has it's own clock and the address/control lines (practically) run at half the clock rate.
