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The analog section needs (at least) dual +VE and -VE supplies.
Digital speed is fairly undemanding, but any advice if a particular option is preferred would be appreciated.
I am considering the following two layer stacks,
A)
- signals, smd components
- gnd fill
- crossing signals
- +VE and -VE power, and 3.3V digial - routed rather than fills, perhaps using star
advantage - both signals and crossing signals are routed adjacent on each side of the reference gdn plane.
disadvantage - inner signals are not visible - making it a bit harder to debug
B)
- signals + smd components
- gnd fill
- +VE fill
- -VE fill + some crossing signals
advantage - +VE is a plane, and -VE is mostly a plane, and signals are on the outside layers and visible
disadvantage
- crossing signals have to route through the +VE fill with a via to get to the bottom layer. And they are further away from gnd - and no longer referenced to gnd?.
I have read a lot about the importance of providing an unbroken reference plane for return current under the trace. Normally this is accomplished by the gnd reference.
However, I believe the reference can be another power plane, at which point capacitance between the planes supposedly becomes a lot more important. It is at this point that my knowledge/understanding is incomplete.
EDIT, ok I think I understand the principle. If we must route a high-speed signal across different reference planes with a via, and those planes are at different potential then we use stiching caps. Like this,
- Comments(1)
A****min
Jul 23.2019, 09:31:05
Your option B can be made to perform quite well if you put ground on layer 2, positive supply on 3, and negative supply on 4. In more detail:
First realize you actually have five rails to worry about, not two: on the analog side there's VCC, AGND, and VEE. On the digital side you have VDD and DGND. You can do it in four layers as there's never more than three rails used in a given section, but that only leaves you one main routing layer. I find this is often enough for a good tightly-coupled analog design, which has most of its connections within circuit blocks and only a few connections between blocks.
First off don't split your ground; AGND and DGND should be logically separated (partitioned by the positioning of components) not physically distinct. If you use a (pretty common) stackup with thin prepreg dielectrics on top of a thick core, layers 1-2 and 3-4 will have tight coupling. This makes 2 an ideal ground (for a single-side-load board with components on the layer 1 side) and 3-4 great for a tightly coupled power pair. As analog circuits typically have the most need for clean power, assigning this pair to VCC-VEE is ideal. If VCC is on 3 (an inner layer) and VEE on 4 (an outer layer), you can remove VEE in the digital section and have a full two routing layers in the digital section, where you need it most. On the digital side you can also run VDD instead of VCC on 3, since nothing will need VCC.
You will need to avoid crossing plane splits on 3 with high-speed signals. (Low-speed signals, for example reset signals or non-PWMed indicator LEDs, don't really matter.) You'll also want to avoid breaking up the VEE plane fill on 4 with too much routing (a short crossing trace here and there is OK). It is also very important to put the power supplies in a place where they will have good connections to the appropriate layers (i.e., there's no sense having the VCC/VEE supplies on an island inside the digital area -- how do they get out?). This often pushes them towards being located somewhere along the analog-digital split in the design, usually on the edge closest to the power entry connector.
With careful attention to physical positioning this stackup will do very well. I have had plenty of success with similar designs.
