日本語
Just looking at the feasibility of a potential stupidly dense design on a 4 layer PCB
Ideally it would use a lot of blind vias between layers 1-2 and 3-4, but it seems this is an expensive process (compared to buried vias between 2-3).
I may be able to live with all the vias going all the way though if I could avoid having via pads on the layers that the don't connect to, particularly the outer layers.
so for example I'd have a 0.15mm hole with 0.4mm pads on layers 1&2 only, or 3 & 4 only.
This is low-volume so needs to be compatible with a normal process
I don't think I've seen a board like this, but can't immediately think why it shouldn't be possible - Anyone done this?
- Comments(1)
A****min
Jan 15.2020, 10:25:43
here's why :
the core is etched first. two outer layers with solid copper are added.
now you need to drill.
perform plating
now photoresist is added. this resist is open over the barrel ( negative process )
they apply tinflash in the barrel and on the annular ring.
then resist is stripped and the resist removed.
the tinflash protects the copper against etching ( sodium persulfate only eats copper , not tin )
if you do not have an annuylar ring the edge of the plated copper would be exposed leading etchand to seep in between the wall of the barrel and the pcb material.
you need a minimum annular ring to prevent this.
due to registration errors in drilling ( typical 2 to 3 mil) they want to see a 6 mil annular ring of 6mm. so, even if you are off 3 mil there is still 3mm material covering the edge of the barrel
why don't you use via in pad ? that way they simply plug the via's in one shot and plate em shut.
no need for stacked via's. and this process is much cheaper
after plating they screen print conductive expoy in the holes , cure it , sand it down ( planarisation) and then plate the entire board again .. expse , tinflash, strip and etch.
