![](/img/images/forum/portrait.png)
Hi All,
We're having some issues with a PCB supplier where we submitted an Altium v10 4-layer PCBDoc to be manufactured.
The manufacturer panelised it into a 2-up panel and had them made. I know for a fact that they panelised it in the PCB editor and then exported Gerbers as a panel.
We got the boards in and they didn't work. Internal plane 3 (which includes several split planes) is totally disconnected and all of the split plane nets were lost. There were also small parts of the polygons on the top and bottom layers missing, particularly where thermal reliefs on pads were supposed to be.
The manufacturer is blaming us for using Altium 10 (they are using 17 to panelise etc), stating that it is infamous for such behaviour?
Funny, because I've never had an issue in the past?
Can someone shed some light on newer versions of Altium please? Has something to do with copying/pasing designs in the same PCBDoc changed since 10?
I know that if you copy and paste a PCB in 10, even with 'Keep net name' and 'Duplicate Designators' checked, the power plane info is lost. I've always treated this as a no-no and used the 'Embedded Board Array' for such tasks.
Is this perhaps where they are going wrong?
I refuse to believe that it is simply a version translation error like they are trying to pass it off as.
Thanks in advance and sorry for the lengthy first post!
- Comments(1)
![header](https://pcbgogofile.s3-us-west-2.amazonaws.com/web/18/10/09/1635385007747s.jpg)
A****min
Nov 15.2019, 18:15:39
In fact, copied the PCB to panelize and that will cause this problem.
Use the build in panelize function to load PCB by reference and everything will work.
But it's much better to use processed files for PCB production send Gerber files and not the pcb design files!